Mentor Graphics Modelsim SE 2020.4 / 2019.4 / v10.7

Post author:abani
Post published:30/12/2020
Post category:Electrical

Contents

Download Mentor Graphics Modelsim SE

Modelsim

ModelSim packs an unprecedented level of verification capabilities in a cost-effective HDL simulation solution.

In addition to supporting standard HDLs, ModelSim increases design quality and debug productivity. ModelSim’s award-winning Single Kernel Simulator (SKS) technology enables transparent mixing of VHDL and Verilog in one design. Its architecture allows platform-independent compile with the outstanding performance of native compiled code.

The graphical user interface is powerful, consistent, and intuitive. All windows update automatically following activity in any other window. For example, selecting a design region in the Structure window automatically updates the Source, Signals, Process, and Variables windows. You can edit, recompile, and re-simulate without leaving the ModelSim environment. All user interface operations can be scripted and simulations can run in batch or interactivate modes. ModelSim simulates behavioral, RTL, and gate-level code, including VHDL VITAL and Verilog gate libraries, with timing provided by the Standard Delay Format (SDF).

Unified mixed language simulation engine for ease of use and performance
Native support of Verilog, SystemVerilog for design, VHDL, and SystemC for effective verification of sophisticated design environments
Fast time-to-debug, easy to use, multi-language debug environment
Advanced code coverage and analysis tools for fast time to coverage closure
Interactivate and Post-Sim Debug available so same debug environment used for both
Powerful Waveform compare for easy analysis of differences and bugs
Unified Coverage Database with complete interactivate and HTML reporting and processing for understanding and debugging coverage throughout your project
Coupled with HDL Designer and HDL Author for complete design creation, project management and visualization capabilities